Independent offline research notebook

Inside the sound engine.

Understand the DSP56724 program well enough to make safe, measured changes: expose hidden behavior, reshape effects, add new oscillator and synthesis modes, and only then assess more simultaneous parts.

Active: the first clean-room synthesis kernel is golden-tested; stock integration and worst-case profiling are next.
TARGET / IC NXP DSP56724 dual DSP56300 cores
Core clock
246 MHz
Audio block
32 frames
Host
STM32F7
5firmware versions cross-mapped
48,046.875 Hzdecoded ESAI frame rate
15 / 21Project probes audible in the current profile
4verified CPU-emulated clips

CPU-emulated DSP output

Hear the evidence

Matched stock-program probes plus clean-room DSP56300 algorithm kernels. Headphones recommended.

What these are: deterministic CPU-emulator output; each card identifies stock firmware or new clean-room code. What they are not: factory-ROM timbres, hardware captures or proof that a new kernel is integrated yet.
Control

Stock path · baseline

A sustained C4 through the unmodified 1.2.1 Core 0 program. The wavetable source is a clean synthetic seed, not factory ROM data.

2.0s · 48,047 Hz · stereo PCM DSP FNV 0x2a3aa5868c5f0648 WAV SHA a8350daada2008da… Timer 0x00a0e2–0x00a548
Project mutation

Stock path · chorus 127

The same note, host flow and render length with Synth 1 chorus level moved to its declared maximum through the original Project activation code.

2.0s · 48,047 Hz · stereo PCM DSP FNV 0x02dac36866d3202b WAV SHA 12f71f37cb4bdf09… Timer 0x00a0e2–0x00a548
Project mutation

Stock path · reverb send 127

The same controlled render with Synth 1 reverb send at maximum. The recovered send, split, algorithm-output and stereo return buffers all become live.

2.0s · 48,047 Hz · stereo PCM DSP FNV 0x06c2f535bf761d47 WAV SHA 35c2b9403c198960… Timer 0x00a0e2–0x00a548
Clean-room kernel

New code · two-operator PM

A 440 Hz carrier phase-modulated by an 880 Hz operator at 0.25-cycle peak deviation. All 96,094 samples match an independent fixed-point model; this is not yet patched into the stock voice path.

2.0s · 48,047 Hz · stereo PCM DSP FNV 0x367842d53f65222e WAV SHA 9e018836f60961f1… 43 P words · 30.0 cycles/sample

Evidence ledger

Known, likely, unknown

Claims stay deliberately separated from implementation hypotheses.

Proven

The stock audio program runs offline

The STM32 initialization, Project activation, live note routine, Core 1 shared-copy service, stock Core 0 program and ESAI output are coupled in one deterministic CPU-emulation profile.

Proven

Tracks uses the same CPU-emulator foundation as Gearmulator

Both projects pin dsp56300 commit c051afa. Gearmulator contributes device-wrapper, debugger, profiling and hash-gated patch patterns—not reusable Virus oscillator source.

Proven

Effects and voice stages have measurable seams

Voice accumulation, mix, delay, reverb send/return, master ring and ESAI staging are independently observed. Several one-word offline patches already produce changed-and-restored audio evidence.

Hypothesis

Juno-like synthesis is the shortest new-engine path

A composite saw + pulse/PWM + sub oscillator can retain the stock envelopes, filter, voice allocation, mixer and chorus. That bounds both code and integration risk.

Proven

A new two-operator PM kernel runs on the target core

The 39-word benchmark produces 256 bit-exact samples at 20.03 instructions / 30.10 modeled cycles each. A separate two-second render matches the independent Q1.23/Q0.24 model for all 96,094 samples. Stock integration remains unproven.

Partial

All twelve synth voice blocks and global FX are profiled

Six notes per part activate all twelve recovered voice-state blocks plus delay and reverb. The maximum is 42,214 / 81,920 Timer ticks (51.53%). Drum triggers are mapped, but missing external sample memory means the drum renderer is not yet a true worst case.

Possibility map

What could become musical

The order favors bounded experiments that reuse proven stock contracts.

01

Expose more stock state

Stored modulation slots 13–20, deep patch fields, effect macros and live setters can add capability without replacing synthesis code.

High value · lower DSP risk
02

New oscillator modes

Juno-style composite DCO, two-op PM/FM, additive, wavetable and Karplus-Strong modes can reuse the stock voice envelope/filter/mix path.

Best route to new timbres
03

Alternate effects

Chorus, tape/modulated delay, diffusion, freeze, reverb variants, dynamics, width and output coloration can run at part or global block rate.

Strong seams · cycle tests pending
04

Complete engines or more parts

Possible in principle, but these need a new patch ABI, host scheduling, memory allocation, mixer routes and proven worst-case cycles—not just unused UI slots.

Long-horizon research

Chronological notebook

Work log

Short entries are published when a result changes the working model or creates something audible.

  1. Twelve-voice stock stress profile

    Sent six notes to each synth through the original live STM32 method under a mapped high-activity Project. All twelve Y-memory voice blocks change, both part accumulators and global delay/reverb paths are nonzero, and the maximum block cost is 42,214 of 81,920 Timer ticks. Four drum lanes were triggered, but sample-memory reconstruction is still required before calling this a complete worst case.

  2. First new synthesis code and audible render

    Built a firmware-independent DSP56300 kernel lab, then assembled a stateful two-operator phase-modulation oscillator. The 39-word benchmark and two-second render both match an independent fixed-point model exactly; the long render is now published above.

  3. Measured PM cost and footprint

    The benchmark uses a shared 256-word sine table, two persistent phase words and 39 P words. It measures 30.10 modeled DSP cycles per sample before parallel-move optimization; twelve voices would represent about 7.1% of the raw 32-frame DSP-cycle deadline if added wholesale, but replacement cost and worst-case stock load remain unknown.

  4. Public emulator audio path

    Added opt-in WAV capture at the ESAI callback. The harness measures all six transmitter lines, selects active transmitter 4, exports the two time slots as stereo PCM and records frame count plus SHA-256.

  5. Gearmulator architecture study

    Confirmed that the existing Tracks harness already uses Gearmulator's exact dsp56300 revision. Adopted its checksum-gated patch discipline and separated multi-DSP emulation lessons from unsupported single-chip capacity assumptions.

  6. FM and Juno reference selected

    AMY is the strongest clean reference found: MIT-licensed fixed-point C with six-op DX7 routing, a Juno voice, bandlimited oscillators, filters and effects. It will supply behavior and vectors, not drop-in DSP code.

  7. Current implementation target

    Build a 32-sample kernel ABI and assemble a sine lookup plus two-operator phase-modulation routine. Compare golden output and exact emulator cycles before touching the stock oscillator dispatcher.

Research boundary

Reproducible, offline, recoverable.

  • Firmware SHA-256 and exact expected old words gate every derived patch.
  • All DSP execution and audio generation shown here is offline; no Circuit Tracks is written.
  • Public artifacts contain rendered PCM and high-level metadata only—no firmware, ROM, DSP program words, host tables or detailed event traces.
  • Every change needs a variant, restored control, stable framing and bounded Timer result before hardware consideration.